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note: left blank if standard all specifications and markings subject to change without notice 29 journey aliso viejo, ca 92656 usa (949) 448-7070 f ax : (949) 448-8484 e- mail : abinfo @ abracon.com i nternet a ddress : www.abracon.com abracon is iso 9001 / qs 9000 certified corporation abracon -55- ? abracon is iso 9001 / qs 9000 certified ttl / cmos and sine wave crystal oscillators temperature-compensated xtal oscillators actx 1018 and acvtx 1018 series table 1 dimensions: inches (mm) note: pin 1 may be present with no connection function. 0 c to + 50 c c 05 c 10 c 15 c 20 c 25 c 30 c 50 -10 c to + 60 c d 10 d 15 d 20 standard d 30 d 50 -20 c to + 70 c e 20 e 25 e 30 e 50 -30 c to + 75 c f 20 ( * ) f 25 ( * )f 30( * ) f 50 ( * ) -40 c to + 85 c g 30 ( * ) g 50 ( * ) frequency - vs.- temperature temperature 0.5 ppm 1 ppm 1.5 ppm 2 ppm 2.5 ppm 3 ppm 5 ppm range c max. max. max. max. max. max. max. applications: cellular and cordless phones. car telephones. facsimile and computer control. communication equipment features: compatible with 14 pin dual in line. tight stability available. control voltage function. compact size. low current consumption. low can height option.

parameters actx 1018 (a) actx 1018 s acvtx1018 (a) acvtx1018s (a) ac x tx 1018 x x - frequency - t emperature & frequency stability - max. can height xx.xxxxx mhz blank or s blank or a blank or v h5 for 5.08 mm

pin # function 1 vc or n/a 7 gnd / case 8 output 14 v cc for test circuit, waveforms, please see page 67. environmental and mechanical specifications on page 68, group 4. marking, see p. 79. frequency range (f o ) 1 mhz - 26 mhz 8 mhz - 45 mhz operating temperature (t opr )-10 cto+ 60 c (see options / table 1) storage temperature (t sto )-40 c to + 85 c frequency stability -vs- 25 c supply voltage (v dd ) 5 vdc 5% or 3.3 vdc 5% (a series) input current ( i dd ) 20 ma max. 2 ma max. for f < _ 26 mhz 4 ma max. for f > 26 mhz duty cycle or symmetry 40 / 60% max. n / a rise and fall times (t r / t f ) 10 ns max. n / a output load 15 pf or 2 tt l 10 k ? // 10 pf output voltage (v oh ) 0.9 * v dd min. 1 v pp min. clipped sine (v ol ) 0.4 v dc max. 0.7 vpp min. (a series) frequency adjustment 3 ppm min. (internal trimmer) vc and freq. pulling (v series) 0.5 v to 4.5 v or 0.3 v to 3.0 v ( 10 ppm min.) 0.5 ppm max -vs- temperature 2.5 ppm max. (see options / table 1) -vs- aging 1 ppm per year max. -vs- supply voltage 0.5 ppm max. ( * ) d epending on f requency 0.024 ( o / 0.6) ref. 22355 abracon corx 2-29.qxd 3/6/00 6:55 am page 55
29 journey aliso viejo, ca 92656 usa (949) 448-7070 f ax : (949) 448-8484 e- mail : abinfo @ abracon.com i nternet a ddress : www.abracon.com abracon is iso 9001 / qs 9000 certified corporation abracon -56- ? crystal oscillators technical terms nominal frequency: the center or nominal output frequency of a crystal oscillator. package: crystal oscillators are packaged in various styles from lead through holes to surface-mount types. various sizes and functions are suitable for different applications. frequency tolerance: the deviation from the nominal frequency in terms of parts per millions (ppm) at room temperature. (25 5 c) frequency range: the frequency band that the oscillator type or model can be offered. frequency stability: the maximum allowable frequency deviation compared to the measured frequency at 25 c over the temperature window, i.e., 0 c to +70 c. typical stability is 0.01% ( 100 ppm). operating temperature: temperature range within which output fre- quency and other electrical, environmental characteristics meet the specifications. aging: the relative frequency change over a certain period of time. this rate of change of frequency is normally exponential in character. typically, aging is 5ppm over 1 year maximum. storage temperature: the temperature range where the unit is safely stored without damaging or changing the performance of the unit. frequency vs. power supply variation: maximum frequency change allowed when the power supply voltage is changed within its specified limits (typical 10% in v cc or 5% change). supply voltage (vdd max): the maximum voltage which can safe- ly be applied to the vcc terminal with respect to ground. maximum supply voltage for ttl is 5.5v and for hcmos is 7v. input voltage (v in ): the maximum voltage that can be safely applied to any input terminal of the oscillator. output high voltage (v oh ): the minimum voltage at an output of the oscillator under proper loading. output low voltage (v 0h ): the maximum voltage at an output of the oscillator under proper loading. input high voltage (v ih ): the minimum voltage to guarantee threshold trigger at the input of the oscillator. input low voltage (v il ): the maximum voltage to guarantee the threshold trigger at the input of the oscillator. supply current (lcc): the current flowing into vcc terminal with respect to ground. typical supply current is measured without load. symmetry or duty cycle: the symmetry of the output waveform at the specified level (at 1.4v for ttl, at 1/2 vcc for hcmos, or 1/2 waveform peak level for ecl). sym = th x 100 (%); see fig. 1. t fan out: the measure of driving ability of an oscillator, expressed as the number of inputs that can be driven by a single output. it can be represented by an equivalent load capacitance (cl) or a ttl load circuit consisting of diodes, load resistor, and a capacitor. rise time (t r ): waveform rise time from low to high transition, measured at the specified level 10% to 90% for hcmos, 20% to 80% for ecl 0.4 v to 2.4v for ttl. fall time (t f ): the waveform fall time from high to low transition, measured at the specified level 90% to 10% for hcmos, 80% to % for ecl 2.4v to 0.4v for ttl. jitter: the modulation in phase or frequency of oscillator output. hcmos / ttl compatible: the oscillator is designed with acmos logic with driving capability of ttl and hcmos loads while main- taining minimum logic high of the hcmos. tristate enable: when the input is left open or tied to logic ? 1 ? , the normal oscillation occurs. when the input is grounded (tied to logic ? 0 ? ), the output is in high impedance state. the input has an internal pull-up resistor thus allowing the input to be left open. output logic: the output of an oscillator is designed to meet vari- ous specified logic states, such as ttl, hcmos, ecl, sine, clipped-sine (dc cut). harmonic distortion: the non-linear distortion due to unwanted harmonic spectrum component related with target signal frequency. each harmonic component is the ratio of electric power against desired signal output electric power and is expressed in terms of dbc, i.e. -20dbc. harmonic distortion specification is important espe- cially in sine output when a clean and less distorted signal is required. phase noise: the measure of the short-term frequency fluctuations of the oscillator. it is usually specified as the single side band (ssb) power density in a 1hz bandwidth at a specified offset frequency from the carrier. it is measured in dbc/hz. stand by: a function that temporary turns off the oscillator and other dividers to save power. logic ? 0 ? will enable stand by mode. the dis- able current at stand by mode varies from a few micro-amperes to tens of micro-amperes (5a typical). because oscillation is halted, there is a maximum of 10 ms (same amount of start-up time) before output stabilizes. figure 1 22355 abracon corx 2-29.qxd 3/6/00 6:55 am page 56
29 journey aliso viejo, ca 92656 usa (949) 448-7070 f ax : (949) 448-8484 e- mail : abinfo @ abracon.com i nternet a ddress : www.abracon.com abracon is iso 9001 / qs 9000 certified corporation abracon -57- ? crystal oscillators application notes cmos rise and fall times the rise and fall time on the cmos technology depends on its speed (cmos, hcmos, acmos, bicmos), the supply voltage, the load capacitance, and the load configuration. typical rise and fall time for cmos 4000 series is 30ns, hcmos is 6ns, and for acmos (hcmos, ttl compatible) is 3 ns max. typical rise and fall time is measured between 10% to 90% of its waveform level. (see example of wave output; fig. 1.) acmos output termination techniques due to the fast transition time of the acmos (hcmos/ttl com- patible) device, proper termination techniques must be used when testing or measuring electrical performance characteris- tics. termination is usually used to solve the problem of voltage reflection, which essential cause steps in clock waveforms as well as overshoot and undershoot. such effect could result in false clocking of data, as well as higher emi and system noise. termination is required also because of the length of the trace on the pc board and its load configuration. there are three general methods of terminating a clock trace, which is a process of matching the output impedance of the device with the line impedance: 1) series termination; 2) pull-up/pull-down termination; 3) parallel-ac termination
$ series termination (fig. 3) in series termination, a damping resistor is placed close to the source of the clock signal. value of rs must satisfy the following requirement:
6 $ pull-up / pull-down resistors (fig. 4) figure 4 in pull-up/pull-down termination, the thevenin ? s equivalent of the combination is equal to the characteristics impedance of the trace. this is probably the cleanest, and results in no reflections, as well as emi. r t ~ z t
$ parallel ac termination (fig. 5) figure 5 in parallel ac termination, a r-c combination is placed at the load. the value of the capacitor must be chosen carefully, usual- ly smaller than the 50pf. this termination is not recommended because it will degrade the rise and fall time of the clock, al- though it draws no dc current. output waveform figure 1 figure 3 rs > _ z t - ro dut r 1 r 2 v cc zt load load dut r s z t load dut r l c l c c zt voh vol overshoot undershoot figure 2 22355 abracon corx 2-29.qxd 3/6/00 6:55 am page 57
29 journey aliso viejo, ca 92656 usa (949) 448-7070 f ax : (949) 448-8484 e- mail : abinfo @ abracon.com i nternet a ddress : www.abracon.com abracon is iso 9001 / qs 9000 certified corporation abracon -58- ? crystal oscillators questions and answers q: why the overall frequency stability is specified in crystal oscillators but not in crystals? a: the crystal oscillator is typically used as a master clock for the microprocessor and its parameters are not affected by the internal characteristics of the microprocessor such as variation in load capacitance and other variables that could affect the change in frequency at room and over temperature. the over- all frequency stability in crystal oscillators is typically 100ppm max. and includes frequency calibration at 25 c, over temper- ature, frequency changes due to load, supply, aging, vibration, and shock. q: what is the start-up time? a: start-up time is the delay time between the oscillation starts from noise until it reaches its full output amplitude when power is applied. the supply voltage must be applied with a defined rate or rise. the start-up time varies from micro- seconds to milliseconds depending on frequency, asic speed and logic. please see figure 1. q: what is tristate enable/disable mode? a: when the voltage at the control pin is set to a logic low ? 0 ? , the output is in tri-state mode that is high impedance. the disabled current is usually lower than its normal operating cur- rent but not completely cut-off as it was seen in the stand-by mode, where the oscillation is shut down completely. there is an internal pull-up resistor between control pin and supply (typically 100 k ? ), therefore the control pin can be left open (floating) if unused. q: what is jitter and how to specify its maximum value? a: jitter is noise caused by many sources in crystal oscillators. major sources of noise are: power supply noise. integer multiples of the signal source frequency (harmonics). load and termination conditions. amplifier noise. circuit configuration (plls, multiplier, overtone, etc.) the following methods can be used to suppress the noise condi- tions in the above sources: make sure that the power supply noise is filtered by using bypass capacitors, chip beads, or rc filters. if jitter is critical in some applications, especially for high- frequencies noise, use low harmonics outputs or sine output. make sure that load and termination conditions are opti- mized to avoid reflected power back to its output. typically, plls, multiplier or programmable designs pro- duce higher jitter than the conventional fundamental design. it is very important to understand the jitter requirements from the application to specify the right specification for crystal oscillators. we can classify two types of jitters: cycle to cycle jitter period jitter. cycle to cycle jitter the cycle to cycle jitter is the maximum difference in time between several measured periods. usually a minimum of ten (10) cycles is used where t1 to t10 were recorded . see fig. 2. period jitter. the period jitter is the maximum change of a clock edge. it is usually expressed as peak-to-peak jitter and can be converted to rms value by multiplying to (0.5) x (0.707). the period jitter can only be measured at each cycle but not multiple cycles. see figure 3. typical jitter recorded in abracon oscillators varies from 20ps to 60ps rms. q: what is phase noise and how to measure it? a: phase noise is the expression of noise in the frequency domain. it is a measure of the short-term frequency fluctua- tions of the oscil- lator. it is usually specified as the single sideband power density in a 1hz bandwidth at a specified offset fre- quency from the carrier. in order to measure phase noise, it is necessary to pair a similar device- under-test with one unit set a vcxo and other set a fixed xo. please see block diagram in figure 4. typical phase noise in abracon vcxo and oscillators: 10 -70 100 -110 1,000 -125 10,000 -150 100,000 -160 figure 1 figure 3 figure 2 jitter = maximum delta (ts) offset phase frequency noise (hz) ( dbc/hz) figure 4 22355 abracon corx 2-29.qxd 3/6/00 6:55 am page 58
29 journey aliso viejo, ca 92656 usa (949) 448-7070 f ax : (949) 448-8484 e- mail : abinfo @ abracon.com i nternet a ddress : www.abracon.com abracon is iso 9001 / qs 9000 certified corporation abracon -59- ? vcxos and tcxos questions and answers q: what are the factors that affect frequency pullability? a: the frequency pullability or deviation in vcxo is the change in the output frequency with respect to change in control voltage. pullability is usually specified as min- imum; however, in some applications, a maximum pulling value is also specified to avoid circuit instability. please refer to figure 1 for a typical colpitts vcxo circuit: some major factors that affect the frequency deviation in vcxo: load capacitance value c1 and c2. frequency. crystal characteristics (c1, c0/c1, size) varactor type and capacitance. voltage control vc. operating temperature. the frequency pullability can be increased either by using a low capacitance with sharp slope varactor, connect in series another varactor or an inductor, adjusting load capacitor val- ues c1 and c2, or increasing control voltage. be very careful when considering any above methods because it may create circuit instability which has a severe effect on jit- ter, linearity, unwanted modes, frequency hysteresis, or fre- quency shift over temperature. q: what is the typical input impedance? the input impedance is a function of modulation frequency. its minimum input impedance is 50kw at 10khz. q: what is the transfer function? a: the transfer function is the direction of change in frequency versus the change in control voltage. most applications require a positive transfer function, which the frequency rises when increasing control voltage. q: what is linearity and what are the factors that affect it? a: linearity is the deviation from the best straight- line slope of the frequency versus control voltage curve. the typi- cal linearity in abracon vcxo is 10% maxi- mum for standard pulla- bility. larger pulling may worsen the linearity. q: what is the modulation bandwidth? a: the modulation bandwidth is the minimum 3db bandwidth frequency, relative to a 1khz to 10khz modulation frequency. unless otherwise specified as default, other values of modula- tion bandwidth and frequency must be specified when ordering. q: what is the control voltage? a: the control voltage is the external voltage applied to the input of the vcxo. it consists of a minimum, a maximum, and a center voltage. the center control voltage is the nominal volt- age that sets the oscillation frequency to its minimal value. standard control voltages: vc min = 0.5vdc; vc max. = 4.5vdc; vc center = 2.5vdc 0.5v q: what is a tcxo? a: a tcxo (temperature-compensated crystal oscillator) is a crystal oscillator that has a high-precision crystal, a tempera- ture-compensated network. there are several methods to design a compensated network, which could vary from simple, less expensive to, complicate and very expensive: method 1 : thermistor/capacitor networks (direct compensation). lowest cost, no varactor needed. method 2: traditional thermistor network. method 3 : analog polynomial generator method 4: digitally segmented analog method 5: digital compensation method 6: digital compensation with dac voltage summers. figure 3 shows a traditional thermistor network: q: why and when we need to use a tcxo? a: we need to use a tcxo when the frequency stability of the oscillator falls beyond the design limitation of a standard simple (fixed) crystal oscillator which is typically less than 5ppm over a standard or extended temperature window. the tcxo costs more due to its complex circuit and manufacturing. q: why there is an internal trimmer or control voltage on a tcxo? a: the purpose of the internal trimmer (variable capacitor) or a control voltage is to re-adjust the frequency to its nominal fre- quency for aging compensation or initial setting. the internal trimmer is accessible via a hole on top of the tcxo can and can be adjusted with a special tool. the control voltage can be set with a voltage divider or an external voltage. both methods of adjustment usually can not produce large frequency deviation rather than 5 to 15ppm enough to offset the frequency due to standard aging. q: how to specify frequency stability on a tcxo? a: unless otherwise specified, the frequency stability on a tcxo is specified as follows: due to temperature change: 2.5ppm @ -20 c to +70 c due to aging: 1ppm per year max. due to supply voltage (5%): 0.3ppm max. the frequency drift due to temperature change is referred to nom- inal frequency set at 25 c. figure 1 figure 3 figure 2 22355 abracon corx 2-29.qxd 3/6/00 6:55 am page 59
29 journey aliso viejo, ca 92656 usa (949) 448-7070 f ax : (949) 448-8484 e- mail : abinfo @ abracon.com i nternet a ddress : www.abracon.com abracon is iso 9001 / qs 9000 certified corporation abracon -60- ? crystal oscillators recommended handling and layout i. electrical 1) supply voltage most of abracon oscillators utilize a cmos technology asic chip with extreme esd sensitive. when apply power to the oscillator unit, be sure to check the polarities before con- necting to the terminals. reversed polarity connections may cause the unit to be damaged electrically (dead) or mechan- ically (burn, color change). pin 1 is usually identified by a black dot marked on cover. be sure to apply voltage to the oscillator not exceeding the maximum specified value which is typically 7vdc max. for most cmos ic. applying under rating voltage could result to no or unstable oscillation. although many metal can oscillators have built-in bypass capacitors, it is a good practice to add an external bypass capacitor 0.01f near the vdd ter- minal. the exter- nal capacitor is used as an over impressed voltage and overcurrent protective device. figure 1 shows a typical layout for a surface-mount crystal oscillator. 2) load impedance oscilloscope impedance shall be greater than 1 m ? with probe capacitance less than 15pf. the load applied shall include probe capacitance. all lead length should be kept as short as possible especially ground trace. output trace from oscillator output to the load (next ic) shall be kept short and avoided layout in parallel or cross with another hot signal trace. stray capacitance and inductance have major effects on output impedance of the oscillator unit and shall be minimized. 3) output frequency output frequency shall be measured with a precision fre- quency counter using a reference external time base. make sure to stabilize the crystal oscillator (warm-up) before recording the final frequency value, especially on high frequency and high current units. ii. mechanical 1) vibration and shock do not apply or cause sudden shock and vibration exceed- ing its maximum specifications to the unit. severe drop or hit with a hard object could damage the unit electrically and mechanically. please check the unit if dropped before assembling or using. 2) mounting the following precautions shall be applied during mounting through-hole crystal oscillators: do not force spreading the terminals into socket or pcb holes. this will avoid breaking the glass insulation on terminals. do not apply excessive soldering heat or soldering duration on terminals. when bending leads for surface-mount, be very care- ful to use appropriate tool keeping a safe distance between the terminal base and the bent area. the following precautions shall be applied to all surface- mount oscillators: use the appropriate reflow condition as recommended on the unit specification. please make sure to not exceed the peak temperature, its maximum duration, the number of exposures, the rate of temperature change vs. time, etc. 3) cleaning do not use solvents not recommended to clean to avoid discoloration or damage on ink marking permanency. some solvents, which contain chlorine, may cause some color discoloration on some metallic cover. do not exceed the maximum recommended temperature when cleaning. iii. packaging although an anti-static protection circuit is built-in the asic, excessive static electricity level may damage the unit. abracon uses conductive packing materials for all oscillators. by sure to ground with esd strap before handling the device. iv. handling unused terminals some abracon oscillators include tristate function. although there is an internal pull-up resistor to prevent floating, it is rec- ommended to terminate the tristate terminal to vdd with a resistor of 100 k ? in series. v. storing please store all units at normal temperature and humidity. high humidity may cause deterioration to units. avoid storing over a long period. please perform visual and electrical inspections before using once the units are stored over a long period. figure 1 22355 abracon corx 2-29.qxd 3/6/00 6:55 am page 60

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